StarFabric Backplane Article 1 Point-to-point connections across a switched fabric appear to be the future of backplanes. Ethernet backplanes will address some of the next-gen backplanes issues like scalability and reliability for IP traffic. Along with the StarFabric working group, Bustronic is developing the backplane utilizing StarGen's switched fabric technology addressing higher speeds (multiple Gbps per slot), enhanced HA and QoS requirements, and more. The StarFabric Working Group is a partnership of leading companies dedicated to developing the next-generation communications system. Initial members include Agere Systems (formerly Lucent MicroElectronics) Bustronic, Elma, FCI/Berg, Motorola Computer Group, Natural MicroSystems, Pigeon Point Systems, StarGen, Sun Microsystems, and Ziatech (an Intel company). StarFabric is a high-bandwidth, scalable technology utilizing switched fabric across the backplane compatible with existing technology. It can connect at the chip-to-chip, board-to-board, or chassis-to-chassis level. It allows a few endpoints, up to thousands. The point-to-point connections isolate faults to single endpoints, enhancing reliability, and are friendly to device insertion and removal. The StarFabric technology, like cPSB, fits into the existing IEEE 1101.10 mechanical framework. It is compatible with CompactPCI bussing and supports the H.110 telephony bus providing an easy upgrade path for the system design. The CompactPCI form factor cards are hot swappable and the switched fabric technology lends itself to high availability applications. The initial products that will run in the backplane include a PCI-to-StarFabric bridge and a 6-port switch manufactured by StarGen. Agere Systems has also announced an H.110-to-StarFabric bridge. The serial links on each device consist of four 622Mbps LVDS, bi-directional differential pairs. The completed system will support hot swap, error detection, fault isolation, system notification and support for automatic fail-over. In high availability (HA) systems, redundancy and hot swap capability are requirements. Therefore, the backplane will need allowances for pluggable fan trays, power supplies and system management and monitoring. For power supplies, the PICMG 2.11 Power Supply Interface specification defined a 47-pin Positronic connector for pluggable supplies. Power supplies are hot swappable by the OR-ing diodes in the supplies. Power supplies monitor the health of the voltages on the backplane through either third wire or droop current sharing methods. Current droop regulates to within 10-15% and third wire regulates to 5%. The power supplies and fans have indicators in case of failure for ease of diagnosis and replacement. Different Traffic and the Protocol Data, voice and video are increasingly being transported as digital data moving across a common network. The StarFabric architecture provides deterministic delivery of isochronous traffic (voice) and asynchronous traffic across the backplane. It makes a distinction between the data payload --- whether its packet-oriented, IP traffic, or QoS-oriented traffic requiring real-time delivery, like voice or TDM traffic. The StarFabric protocol supports three routing methods: address, for full compatibility with PCI and H.110; path; and multicast. Redundant routing and hardware failover are provided for high availability. Ethernet backplanes and the StarFabric backplane will probably have hybrids in the real-time/isochronous traffic space with speeds of less than 100Mbit per link or so. But for higher speeds, StarFabric may be the way to go with its bandwidth capabilities and other special features. Hybrid backplane features The hybrid backplane will be used for proof-of-concept and working demonstrations. With its expertise in complex, custom, and high-speed backplanes, Bustronic has been developing the backplane for the StarFabric Working Group. The 21-slot hybrid backplane is currently being tested in a 7U form factor. (Final versions will likely come in 10U, with room for hot-pluggable components.) It is made up of five CompactPCI segments utilizing standard cPCI 2mm hard metric connectors. Two segments are two slots wide and each segment has a system slot for supporting existing process cards and a fabric-native node slot. Three segments are five slots wide. The system slot of these segments supports a StarFabric system/node slot and four IO slots compatible with existing line cards. Two of the fabric native node slots are connected to CompactPCI standard power and ground. Three of the CompactPCI segments are routed with H.110 per PICMG 2.5 on P4 and P5 for future applications. The StarFabric links are redundant between the fabric-native node slots and the system/node slots. Point to point links are between fabric-native node slots (with CompactPCI bussing) and the non-bussed fabric-native node slots. The links are on P3 and P5. Each link is made up of four transmit pairs and four receive pairs. (See figure 1) Layers The StarFabric backplane has a 12-layer controlled impedance stripline design (the layer count may increase in later stages). The outside layers are ground for EMI protection and suppression. The signal layers are alternated with power or ground layers for controlled impedance and to minimize crosstalk. Vias are not used on signal traces because they disrupt the impedance of the trace. Power and ground planes are 2 oz. copper. High and low frequency decoupling capacitors are distributed generously across the backplane. The CompactPCI bussing on P1 and P2 and the H.110 bus on P4 can be routed in 8 layers. Some of the StarFabric links can be routed on the same 8 layers and the remainder on the other four layers. The differential pairs are routed as close together as possible and kept on the same layer. Power Considerations StarFabric Bridge chips are low power consumers and will not require special power or cooling considerations. This is an important feature as it helps keep system costs low. |
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