Bustronic Corporation - VME backplanes, CompactPCI backplanes, cPCI with H.110, VME64x, VME320, custom backplanes

The market for communications systems is booming as major innovations in processing and transmission change the rules of the marketplace. On the supply side of the equation, fiber optic backbones can speed unprecedented amounts of information to points around the world. On the demand side, businesses and consumers are pushing their carriers to combine this capability with all the promised benefits of digital convergence. All of this powerful throughput on the supplier end of the spectrum and all of the expectation for high quality, high value communication applications on the consumer end is putting increasing pressure on a critical potential bottleneck point in the flow - the interconnect subsystem within the communication systems themselves.

Compact PCI today plays an important and growing role in providing open 'off-the-shelf' solutions for this communication equipment interconnect. However, market pressure for increased functionality is straining the capabilities of the current bus-based Compact PCI architecture. This represents both a challenge and a tremendous opportunity for CompactPCI. There are two important questions the Compact PCI community needs to address. First, exactly what are the market driven requirements for interconnect technology in next generation communication equipment? And, second, how can the Compact PCI community meet those needs in a way that makes business sense for themselves and their customers?

These are important and timely questions. CompactPCI's success in the communication and networking markets has been impressive and reflects its ability to meet fundamental needs of the equipment OEMs and their customers. As a community, we need to be looking at how this success can be maintained and expanded upon - in light of ever more challenging requirements.

In most communication equipment today the interconnect architecture either leverages widely available bus standards like PCI and H.110 or it is proprietary. Proprietary approaches have generally been utilized to address performance requirements of high-end solutions. Communication equipment vendors have used in-house ASIC resources to develop custom semiconductors to implement these solutions. The advantages of custom ASICs are that they are well tuned for their specific function and provide high performance and a robust feature set.

Expense with dedicating scarce design resources
Fixed function designs prevent multiple product offerings or future generations
Time-to-market is risked if complex ASIC developments fall behind schedule
Point solutions are unable to achieve the volume scales needed to drive down cost, resulting in expensive solutions only suitable for the high end of the marketplace

Standards-based solutions benefit from compatibility across vendor platforms and can achieve low cost through high volume. For PCI, a wide spectrum of components is available to communication equipment designers as low cost system building blocks. Direct PCI interfaces - or standard PCI interface chips - are available for most network controllers, DSPs, and processors. PCI is well understood and well supported in the hardware and software space. Similarly in traditional TDM circuit switched systems, a standard like H.100 provides the same benefits. There are downsides these standards however. For designers the inherent limitations in these standards are in terms of scalability and robust feature sets to support the increasing demands of next generation equipment.

Ideally, a next generation interconnect solution is required which can provide the benefits of these industry standard solutions in terms of:

Cost
Ease of design
Cross-vendor compatibility
Off-the shelf silicon
Time-to-market

While addressing the limitations of the current bus-based standards in terms of performance, connectivity, scalability, Quality of Service, reliability, flexibility and physical size constraints. Achieving this can provide tremendous upside opportunity for CompactPCI by allowing it to serve a wider set of communication application markets.

Compatibility
As important as the functionality characteristics of a new interconnect is the ease with which it can be adopted by communication equipment designers. A critical requirement in this ease of adoption is backward compatibility. Tremendous investment exists in both hardware and software with current industry standards. OEMs cannot afford to walk away from this investment nor do customers want to be forced into forklift upgrades to begin to move to next generation technology. Transparent access to this legacy hardware and software is highly valuable. For example the new interconnect should provide the ability to reuse PCI, H.110, Cellbus, Utopia, etc., investments in next generation equipment. Additionally by providing compatibility to existing standards, the rate of adoption can be accelerated because there is not a required lag while all new infrastructure is put in place such as compliant silicon, drivers, OS support, etc. The physical implementation should support reuse of standard CompactPCI chassis and boards.
Quality of Service (QoS)
The communication market is in the midst of digital convergence where all traffic types essentially become digital data capable of moving across a common integrated worldwide network. Data, voice, and video need to coexist and their unique requirements need to be addressed. Providing the QoS that can distinguish and service these various classes of traffic with the appropriate priority needs to be extended to the interconnect level. With this enhanced capability, the traditional model of numerous interconnect planes within a single system can be replaced with a single interconnect with QoS built in directly. All traffic including control, signaling, real-time and non-real-time payload can flow across the single interconnect simultaneously.
Scalability and Performance
Until all networks can deliver perceived instantaneous response time for virtual reality levels of information there will be an unfulfilled demand for more network bandwidth and performance. As the number of users of eCommerce and Internet technologies grow, the demand for more aggregated scalability will also continue to incrementally increase. For next generation interconnects, this means inherent scalability that will provide system designers with the ability to match system performance and scale with the target application using the same interconnect architecture. This means scalability from small, inexpensive systems to extremely large systems with 100s and 1000s of endpoints. The underlying technology needs to scale today from T1 to OC48 line rates but also be able to scale beyond this as transmission technology improves. Scalability also needs to be measured in terms of the performance levels supported in single slots. Floor space in central offices and POPs is expensive and OEMs are forced to pack more ports and channels into smaller and smaller spaces. This means that the interconnect technology needs to be able to supply massive bandwidth to individual end-points in a system without limiting the ability to also scale the overall system in terms of number of end points.
Reliability, Availability, and Serviceability
The traditional circuit switched POTs system has set the consumer expectation on reliability. A dial tone is always there and calls go through, with good quality. This level of reliability is achieved through communication equipment that has minimal downtime. The typical desired goal today is to achieve 5-9's (99.999%) availability. The interconnect technology provides a critical role in allowing equipment to achieve these levels of reliability. It must provide fault detection, isolation, and notifications and mechanisms for automatic fail-over and fault recovery.
Multi-Vendor Support
This next generation of interconnect technology should have multi-vendor support to insure a wide range of supporting devices. This will also encourage competitive market factors that insure low cost and unrestricted supply. The interconnect protocol should be an open standard that any company can be utilize. Wide industry backing insures diverse sources of innovation and provides for continual and evolutionary improvements.
Cost Effective System Design
Additionally, a critical requirement is cost. Not just of the base technology itself, but also of the total system cost driven by the interconnect. This means the technology should incorporate not only high value but also cost-effective physical layer technologies. System design issues of power dissipation, cooling, emissions, and manufactureability all need to be considered. The silicon needed to implement the interconnect needs to be in the same cost structure as the current industry standard interconnects and not force changes to more expensive PCB, cabling or connector technology.

It is clear that the existing CompactPCI bus-based interconnects cannot meet these requirements. Fundamentally buses will impose unacceptable constraints on physical scalability, total bandwidth scalability and are unsuitable for achieving the high availability systems required in a cost effective manner. Although bus-based technology has made some strides in improving on these dimensions, it is clear they are not up to the task for the next generation standard interconnect.

A move to a switch fabric based technology is required. Switch fabric technology inherently provides some key benefits. Switch fabrics eliminate the shared nature of a bus architecture. With a bus only one device can be communicating at a time, all other devices must wait until some arbitration scheme determines it is their turn to use the bus. To increase the total throughput of a bus it must either be sped up or widened, both of which tend to put more limits on the number of devices which can be effectively connected to the bus. With a switch fabric each device is connected to every other device in the system through a network of connections. Many devices can be communicating simultaneously. As more devices are added more interconnections can be added to increase the total throughput of the system.

This 'networked' approach vs. a bus architecture also provides significant flexibility in the system design topologies that can be created. Distance limitations of a bus can be eliminated through the use of serial physical layer technology. Redundancy can be built in to the switch fabric interconnections to support high availability designs. Additionally the point-to-point nature of switch fabrics can enhance reliability by isolating faults to single end points in contrast to buses in which an errant end point can bring down the entire bus. Also point-to-point connections are inherently friendly to device insertion and removal.

Although switch fabric concepts are not new, implementations to date have been in the realm of proprietary solutions focused almost exclusively on data transport. A cost-effective switch fabric technology brought to the market in a form compatible to existing standard bus interconnects can be the evolutionary path for CompactPCI to meet next generation communication equipment interconnect requirements.

StarGen's recently announced switch fabric technology has been developed to specifically address these all of these requirements.

The initial silicon components leveraging StarGen's technology include a high throughput switch providing 30Gbps switching capacity with six ports. Additionally in early 2001 StarGen will provide a PCI bridge which interfaces standard PCI buses, up to 66MHz 64bit, to the StarGen serial switch fabric. Bridge chips provided by StarGen and partners will provide access from other existing standard interconnects to the high-speed serial switch fabric. In combination these devices offer manufacturers the ability to build high-speed, scalable and highly reliable systems.

StarGen's switch fabric technology provides manufacturers of communications equipment with an elegant migration path from existing industry standard bus architectures. Backward compatibility with widely available, low cost hardware and software (i.e. PCI, H.110, Utopia, etc.) will be provided including 100% backward compatibility with PCI. Ease of adoption is also enhanced through the use of existing high volume technology. For example, the StarGen switch fabric can be deployed using existing commodity printed circuit board technology, connectors and cabling. Exotic system design techniques for such things as power, thermal or EMI protection are not required.

StarGen's switch fabric architecture is designed to support seven traffic classes including asynchronous classes, isochronous classes, multicast, and high-priority. Asynchronous traffic is traditional data oriented traffic, with large, bursty bandwidth requirements but without real-time delivery requirements. Control and signaling traffic are typically asynchronous. Isochronous traffic, including voice and video, requires deterministic real-time delivery. Through use of these traffic classes, StarGen's technology is ideally suited for communication applications with converged voice, video, and data requirements, meeting each one's unique service requirements. StarGen allows the unification of traditionally separate interconnects for control traffic and data payload traffic. This simplifies design and lowers cost. Today in many voice or video applications, separate infrastructures are maintained for the real-time traffic and the non-real-time traffic - again with StarGen's technology these can be collapsed into a single interconnect architecture.

StarGen's technology allows development of small-scale systems to very large-scale systems with a common architecture. Through use of its flexible switch fabric components, hundreds to thousands of end points can be included in a single system. In the initial implementation, each switch has 30Gbps of switch capacity. The architecture will enable systems to scale to over a terabit per second of capacity. The initial physical layer implemented provides 5Gbps bandwidth for every link. Multiple links can be aggregated to create 'fat pipes' with even greater bandwidth. The links are constructed of four 622Mbps LVDS, bi-directional, differential pairs. The links are well suited for chip-to-chip, backplane, and rack-to-rack interconnect. Using standard category 5 unshielded copper cables the links can extend to over 5 meters in length to support room scale equipment.

StarGen's switch fabric provides attributes which allow system architects to design cost-effective highly reliable, high availability systems. It supports hot plug and hot swap of devices so system components can be removed during system operation without affecting the rest of the system. In hardware it provides error detection, isolation, system notification, and support for automatic fail-over. The flexibility of the architecture allows design of systems with redundant routes, which can be used if primary routes fail.

StarGen designed its technology to provide the benefits of switch fabric technology at the cost structure associated more with traditional bridge solutions. StarGen's switch and PCI interface device will both sell for less than $50 each. StarGen will be making its new switch fabric components available as prototypes in Q1 2001.

The beneficiaries of the evolution of CompactPCI standards-based interconnect technology will be many.

The CompactPCI community will benefit from a greatly expanded market opportunity while maintaining and building upon their current extensive hardware and software investment. They will have a future technology roadmap that can scale with the needs of the market.

OEMs will be able to meet the ever more demanding requirements of their customers while meeting critical time to market imperatives. Additionally they can utilize open standard solutions that still provide opportunities for design creativity and differentiation in their product designs.

Ultimately, consumers will reap the benefits of the technology in the form of high quality data, voice and video services in their businesses and homes.

Todd Comins is an industry-recognized expert in I/O technology and was instrumental in the development and proliferation of PCI as a ubiquitous industry standard. He has 20 years of engineering experience and holds a BSEE from Rensselaer Polytechnic Institute. He was a member of the PCI SIG Protocol Workgroup from its beginnings in 1991 through 1999. He participated in development of the original PCI specification and subsequent revisions. He was chairman of the PCI SIG Bridge Workgroup and was principal author of the PCI Bridge specification. Comins was technical director and 'inventor' of Digital Semiconductor's PCI-to-PCI Bridge products including 11 products brought successfully to volume production and adoption over five years.